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21. Thwaites, C. J., Soft Soldering, Gold Plating Technology, Electrochemical Publications, 1974, ch. 19, pp. 225 245. 22. Karnowsky, M., Rosenweig, A., Trans. Met. Soc. Am. Inst. Min. Engrs, 242, 2257 1958. 23. Fox, A., et al., The Effect of Gold-Tin Intermetallic Compound on the Low Cycle Fatigue Behavior of Copper Alloy C72700 and C17200 Wires, IEEE Transactions on Components, Hybrids, and Manufacturing Technology, Vol. CHMT-9, No. 3, September 1986, pp. 272 278. 24. Prince, A., The Au-Pb-Sn Ternary System, Journal of Less-Common Metals, 12, pp. 107 116, 1967. 25. Shewmon, P., Diffusion in Solids, McGraw-Hill, 1963, pp. 115 136. 26. Seitz, F., On the Porosity Observed by the Kirkendall Effect, Acta Metallurgica, Vol. 1, 1953, p. 355. 27. Zakel, E., and Reichl, H., Au-Sn Bonding Metallurgy TAB Contacts and Its Influence on the Kirkendall Effect in Ternary Cu-Au-Sn System, Proceedings of the 42nd Electronic Components & Technology Conference, May 1992, pp. 360 371. 28. Haimovich, J., Intermetallic Compound Growth in Tin and Tin-Lead Platings, NWC TP 6896, EMPF TP 0003. 29. Moltz, E., Use and Handling of Semiconductor Packages with ENIG Pad Finishes, Texas Instruments Application Report SPRAA55, August 2004. 30. Bryant, K., Investigating Voids, Circuits Assembly, June 2004, pp. 18 20. 31. Yau, Y-H, et al., The Properties of Immersion Silver Coating for Printed Wiring Boards, IPC/APEX, Anaheim, 2005. 32. Aspandiar, R., Voids in Solder Joints, IPC/CCA PCB Assembly and Test Symposium, May, 2005.

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I/O space: A type of addressing region that allows a processor to connect I/O devices instruction pointer: A special register in a processor that points to an address in the program memory from where the current instruction is being executed by the processor ISA: Acronym for Industry Standard Architecture ISA is a bus architecture used in IBM personal computers It allows connectivity between the processor and the associated peripheral circuits and devices ISR: Acronym for Interrupt SubRoutine A program that is executed by the processor when an interrupt occurs in a computer system interrupt vector: Address of an ISR Kbps: Acronym for Kilobits per second Kilo is 1000 here Kbyte: Kilobyte Kilo is 1024 here latency: Usually associated with the interrupts in a computer system and refers to the time it takes to respond to an interrupt signal LED: Acronym for Light Emitting Diode.

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undesired leakage currents and voltages can be controlled (minimum effect) or eliminated (maximum effect).

Form a Faraday cage around the critical conductive patterns and components using a combination of conductive patterns (frequently called input guarding and guard rings) and shielding enclosures. Keep all unguarded voltages out of the Faraday cage or protected area. Electrically connect the Faraday cage to a low-impedance voltage source that follows the critical (protected) voltage.

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15.5.2.2 Guard Rings A Design Method to Control Leakage Currents and Voltages. The control of electrical leakage to the more critical signal terminals/leads can be optimized through the selection of components, various levels of implementing input guarding into the design, and the selection of the materials for the electrical interconnection substrate. Some components provide unconnected, unused, or guard terminals/leads adjacent to the input terminals. Care must be exercised for the balance or trim terminals/leads, as in most cases these terminals are connected (internally) in the component directly into the input differential amplifier circuitry of the component; thus, any undesirable leakage currents or voltages to these terminals/leads may result in undesired operation. Some linear operational amplifiers (op-amps) and other linear components are more suitable for input guarding than others; some have two (or more) unused terminals/leads that are used to improve electrical isolation between the protected terminals/leads in the component itself, as well as the component land pattern and electrical interconnection substrate. The simplest method for providing input guarding to control input leakage currents and voltages is through the use of guard rings of conductive patterns on all layers of PB conductive patterns that surround the terminals/leads and associated circuitry. The guard ring is attached to a low-impedance voltage source that best follows the input signal or, as recommended by some analog IC manufacturers in their application notes, to the metal case of the component. As a result, the input terminals of high-input-resistance, low-biascurrent, low-offset-voltage Op-amps can be guarded from stray electrical leakage currents and voltages.

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